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msp’s watchdog

03 Oct

hey guys

have been  fooling around with the msp4305438 board so couldn’t post for a long time… so I’ll be posting the tutorial on watchdog timer today.This is something which bugged me a lot when i first started with msp, which i feel is really stupid considering the fact that it was really simple.So what is a watchdog timer.We can imagine it as a small hardware which will kick the controller if at all the controller hangs up.It basically resets the controller when it is activated.

Principle

The watchdog timer has a 16 bit timer which counts from 0x00 to 0xffff.When it hits the max value of oxffff the watchdog resets the controller.Our job is to prevent this from happening and we’ve to keep resetting the timer.If the code hangs then the timer is not reset and the watchdog timer overflows and resets the timer.

Timer Mode

The watchdog can also be configured to be a timer which provides interrupts instead of the reset of the controller.But the time delay can be varied to a great extent.It can be varied by varying the clock sources itself or varying the the division factors.

Registers

The watchdog can be configured by using the WDTCTL register.The Upper 8 bits of the WDTCTL has to be written with 0x5A .This is the password protect feature of the watchdog. A failure to write this or writing anything to this nibble will cause a access violation and reset the controller.The lower 8 bits are the control bits and are given as follows.

The Bit definitions are as follows:

WDTHOLD => disables the watchdog timer when the bit is 1.

WDTNMIES =>selects the triggering edge for the non maskable interrupt on RST/NMI pin. 0 indicates a rising edge and a 1 represents a falling edge.

WDTNMI  =>enables the nmi function on the RST/NMI pin.

WDTTMSEL =>selects the timer mode for the watchdog when the bit is 1.

WDTCNTCL => watchdog counter clear resets WDT counter.When the bit is set the counter is reset and the bit is reset immediately.

WDTSSEL => selects the source for the watchdog timer. 0 selects the SMCLK and 1 selects the ACLK.

WDTISx => The division factor for the clock source.

  1. 00 => clk source / 32768
  2. 01 => clk source /8192
  3. 10 => clk source /512
  4. 11 => clk source / 64

There are two other registers which are used with the watchdog.IE1 and IFG1.These have the interrupt enable bits and the interrupt flags for the corresponding sources.

Program Watchdog Mode

Now let us first learn to use the watchdog timer in watchdog mode (WDTTMSEL = 0).

Usually we begin the programs by entering the following code.

WDTCTL=WDTPW+WDTHOLD;

Here we are  first writing the password by writing WDTPW which is a macro of value 0x5A , then we are setting the WDTHOLD bit to stop the watchdog.This is usually done at the time of debugging as the watchdog feature is not required.Now let us assume that we’ve finished the debugging of a certain code and that we are adding the watchdog timer .How do we do it? The following code explains it.Please read through.

#include "io430.h"
int main( void )
 {
 // Stop watchdog timer to prevent time out reset
 WDTCTL = WDTPW + WDTHOLD;
 P1DIR=BIT0+BIT6;
 P1OUT=BIT0;
 int i=0;
 while(1)
 {
 for(i=0;i<32000;i++);
 P1OUT^=(BIT0+BIT6);
 }
 return 0;
 }

The above code stops the watchdog timer and blinks the leds.Now lets us have the watchdog on and see the required changes

#include "io430.h"
 int main( void )
 {
 // Stop watchdog timer to prevent time out reset
 //WDTCTL = WDTPW + WDTHOLD; // doNOT DISABLE the watchdog
 P1DIR=BIT0+BIT6;
 P1OUT=BIT0;
 int i=0;
 while(1)
 {
 for(i=0;i<32000;i++)
 {
 WDTCTL = WDTPW + WDTCNTCL; //keep clearing the counter to prevent the reset
 }
 P1OUT^=(BIT0+BIT6);
 }
 return 0;
 }

In the above code we have to keep clearing the counter at approximately 32ms i.e, the time required by the counter
to count to oxffff with SMCLK as the source.So we have to keep clearing the counter based on the program written.
Since the code I’ve written has only a for loop i’ve added the clearing line in it.

Timer Mode

Now let us use the watchdog as a timer to blink an led.For this we’ve to set the WDTTMSEL bit which enables the timer mode in the WDTCTL register.Then we’ve to enable the interrupt in the IE1 register and right the required routine.The following code is an example.

#include "msp430x20x2.h"
int main( void )
{
  WDTCTL = WDTPW + WDTTMSEL;           //select the timer mode
  IE1=WDTIFG;                          //enable the interrupt
  P1DIR=BIT0+BIT6;
  P1OUT=BIT0;
  _EINT();
  while(1);
}
#pragma vector=WDT_VECTOR
__interrupt void wdttimer(void)
{
P1OUT^=BIT0+BIT6;
IFG1&=~WDTIFG;                          //clear the timer interrupt flag
}

Now lets vary the clock sources and the division factor for the watchdog.I’ll write a program to use the SMCLK and use various division factors and a program to change the clock sources.The ACLK can be used by setting the WDTSSEL bit.

// WDT with SMCLK as Source and varying the division factors.
#include "msp430x20x2.h"
#define WDTCONFIG (WDTPW+WDTCNTCL+WDTTMSEL) //configure wdt in timer mode and clear the count register

int main( void )
{
  // Stop watchdog timer to prevent time out reset
  WDTCTL = WDTPW + WDTTMSEL + WDTCNTCL;
  IE1=WDTIFG;
  P1DIR=BIT0+BIT6;
  P1OUT=BIT0;
  P1IE=BIT3;

  BCSCTL2=DIVS_3;       // slow down the smclk by division to make the blinking slow.details in clock
                        // module tutorial

  _EINT();
  while(1);
}
#pragma vector=PORT1_VECTOR
__interrupt void pin3(void)
{
static int i=0;
i++;
i=i%4;
switch(i)
{
case 0: WDTCTL=WDTCONFIG;   //source divided by 32768
        break;
case 1: WDTCTL=WDTCONFIG+WDTIS0;   //source divided by 8192
        break;
case 2: WDTCTL=WDTCONFIG+WDTIS1;   //source divided by 512
        break;
case 3: WDTCTL=WDTCONFIG+WDTIS0+WDTIS1;   //source divided by 64
        break;       

}
P1IFG&=~BIT3;
}
#pragma vector=WDT_VECTOR
__interrupt void wdttimer(void)
{
P1OUT^=BIT0+BIT6;
IFG1&=~WDTIFG;
}

In the above program the Switch s2 is used to change the speed of the blinking by varying the division factor for the Source of the watchdog which in this case is SMCLK. I’ve slowed down the frequency of the SMCLK by dividing the source signal to it which I’ll discuss in my next tutorial on clocks.Basically the blinking will be slow and noticeable only for the first two clicks of the switch.Later the blinking is too fast to notice.It can be seen using a CRO.

In the program i use the WDTIS0 AND WDTIS1 bits to set the division factor which is as follows.

WDTIS0            WDTIS1

WDTIS_0 =>        0                          0             SOURCE DIVIDED /32768

WDTIS_1 =>         1                           0            SOURCE DIVIDED / 8192

WDTIS_2 =>         0                          1             SOURCE DIVIDED /512

WDTIS_3=>         1                           1            SOURCE DIVIDED /64

So thats about it for now.Also check out the code examples for all the modules in the TI website.The WDT+ feature are explained.Thank you for reading.Have a nice day.

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2 Comments

Posted by on October 3, 2011 in Flip, MSP430 Tutorials

 

Tags: , ,

2 responses to “msp’s watchdog

  1. Farhad Abedini

    May 18, 2016 at 6:19 pm

    thanks for your post

     
  2. Nick

    September 15, 2016 at 9:52 pm

    Went from knowing basically nothing to understanding pretty much everything about WDT. Neato

     

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